专利摘要:
SELF-OSCILLATING RESONANT FORCE CONVERTER. The present invention relates to resonant power converters and inverters comprising a self-oscillating feedback loop coupled from a switch output to a control input of a switching network comprising one or more semiconductor switches. The self-oscillating feedback loop defines a switching frequency of the power converter and comprises a first intrinsic switch capacitance coupled between a switch output and a switching network control input and a first inductor. The first inductor is coupled between a first bias voltage source and the switching network control input and has a substantially fixed inductance. The first bias voltage source is configured to generate an adjustable bias voltage applied to the first inductor. The output voltage of the power converter is flexibly and quickly controlled by controlling the adjustable bias voltage.
公开号:BR112015009554B1
申请号:R112015009554-2
申请日:2013-10-29
公开日:2021-05-25
发明作者:Mickey P. Madsen;Jeppe Arnsdorf Pedersen
申请人:Danmarks Tekniske Universitet;
IPC主号:
专利说明:

[001] The present invention relates to resonant energy converters and inverters comprising a self-oscillating feedback loop coupled from a switch output to a control input of a switching network comprising one or more semiconductor switches . The self-oscillating feedback loop defines a switching frequency of the power converter and comprises a first intrinsic switch capacitance coupled between a switch output and a switching network control input and a first inductor. The first inductor is coupled between a first bias voltage source and the switching network control input and has a substantially fixed inductance. The first bias voltage source is configured to generate an adjustable bias voltage applied to the first inductor. The output voltage of the power converter is flexibly and quickly controlled by controlling the adjustable bias voltage. Background of the Invention
[002] Power density is always a key performance metric of a power supply circuit such as AC-DC, DC-AC and DC-DC power converters to provide the smallest possible physical size for a given power specification. output power. Resonant power converter topologies are well known types of DC-DC/switched mode (SMPS) converters or power providers in the art. Resonant power converters are particularly useful for switching frequencies such as above 1 MHz where the switching losses of standard SMPS topologies (Down, Booster, etc.) tend to be unacceptable for reasons of conversion efficiency. High switching frequencies are generally desirable because of the resulting decrease in electrical and physical size of power converter circuit components such as inductors and capacitors. Smaller components allow for increased energy density of the SMPS. In a resonant power converter a standard SMPS input "pulsing" semiconductor switch (often MOSFET or IGBT) is replaced by a "resonant" semiconductor switch. The resonant semiconductor switch relies on the resonances of circuit capacitances and inductances to shape the waveform of current or voltage through the switching element such that, when switching occurs, there is no current or voltage across the switching element. Therefore, energy dissipation is largely eliminated in at least some of the intrinsic capacitances of the input switching element such that a dramatic increase in switching frequency becomes feasible, for example, for values above 10 MHz. is known in the art under designations such as zero voltage and/or current switching operation (ZVS and/or ZCS). Commonly used switched-mode power converters operating under the ZVS and/or ZCS are often described as class E, class F, or class DE power inverters or converters.
[003] However, fast and accurate control of the output voltage of the resonant energy converter remains a challenge. The prior art power converters described in the references below propose to use a self-oscillating feedback loop around the input switching element and driven by the intrinsic or inherent drain-source capacitance of a MOSFET switch in combination with an inductance in variable series coupled to the port terminal of the MOSFET switch.
[004] U.S. document 4,605,999 discloses a self-oscillating energy converter comprising a self-oscillating inverter circuit built around a single MOSFET switch. The MOSFET switch's inherent drain-source capacitance provides a feedback path sufficient to sustain self-oscillation of the inverter circuit if the operating frequency is high enough. The power converter is voltage regulated by a feedback loop that derives the control signal from a DC output voltage of the converter and applies the control signal to a variable inductance network comprising an inductor and a pair of non-conductors. linear.
[005] The US 5,430,632 document discloses a self-oscillating power converter that uses a pair of MOSFET transistor switches in a half-bridge configuration in which the junction of the two MOSFET transistors is coupled to a reactive network that, successively, is connected to an output rectifier. The interelectrode gate-drain capacitances intrinsic to the switching transistors serve as the only means of sustaining the oscillations. The oscillations are initiated at the gate-source terminals of the MOSFET transistor switches by a starter circuit. The oscillation frequency is determined by the gate-source capacitance of MOSFET transistor switches and the inductance of an insulated gate drive transformer. The oscillation frequency is controlled by varying the inductance of the isolated gate drive transformer coupled to the gate terminals of the MOSFET transistor switches via a pair of control windings.
[006] However, the possible regulation range of adjustable inductances and/or capacitances tends to be very narrow due to physical component limitations and accuracy can also be limited. Furthermore, adjustable inductances and/or capacitances are difficult to integrate into semiconductor substrates or ordinary circuit carriers like printed circuit boards. Finally, the maximum regulation speed of the inductance or capacitance can be limited due to the reactive nature of the component which leads to an undesirable limitation of the speed of regulation of the converter output voltage. this is, of course, undesirable in view of the advantages of moving to higher converter switching frequencies for the reasons discussed above.
[007] Consequently, it would be advantageous to provide a control mechanism for the oscillation frequency that eliminates the need for variable reactive components such as inductors and capacitors such that the converter output voltage can be controlled, appropriately, by controlling a level of a circuit voltage or circuit current, for example, in the form of an adjustable bias voltage. Invention Summary
[008] A first aspect of the invention relates to a resonant energy converter or inverter comprising an input terminal for receiving an input voltage and a switching network comprising one or more semiconductor switches controlled by the respective control inputs . The switching network comprises a switch input operatively coupled to the input terminal for receiving the input voltage and a switch output operatively coupled to an input of a resonant network of the resonant energy converter. The resonant network comprises a predetermined resonant frequency (fR) and an output operatively coupled to a converter output terminal. A self-oscillating feedback loop is coupled from the switch output to a switching network control input to set a power converter switching frequency. the self-oscillating feedback loop comprises a first intrinsic switch capacitance coupled between the switch output and the switching network control input, a first bias voltage source configured to generate a first adjustable bias voltage, a first inductor with substantially fixed inductance coupled between the first bias voltage source and the switching network control input. A resonant energy converter voltage regulation loop is configured to control an energy converter output voltage by controlling the first adjustable bias voltage applied to the first inductor.
[009] The present resonant energy converter allows flexible, fast and accurate control of the converter output voltage by controlling the adjustable bias voltage applied to the first inductor coupled to the control input of the switching network. By adjusting an adjustable bias voltage level, an oscillating frequency of the self-oscillating feedback loop coupled around the switching network can be controlled so as to set a switching frequency of the resonant energy converter. Adjustment of the oscillating frequency of the self-oscillating feedback loop is achieved without making any adjustment to the inductance of the first inductor, which therefore has a substantially fixed inductance independent of the level of the adjustable bias voltage. The person skilled in the art will understand that the term "substantially fixed" which characterizes the inductance of the first inductor includes an inductance that varies slightly over temperature depending on the electrical characteristics of a particular material of the selected inductor type. Furthermore, the application of the first adjustable bias voltage to the first inductor is preferably performed without any adjustment of an inductive or capacitive reactance of a component coupled in series with the first inductor in the voltage regulation cycle. Therefore, the first adjustable bias voltage generated by the voltage regulation cycle is preferably applied to the first inductor without any transformer, adjustable inductor or adjustable capacitor in series with the first inductor.
[0010] The ability to adjust the switching frequency of the present resonant power converter by adjusting the level of the first adjustable bias voltage enables a wide and accurate control range of the switching frequency and eliminates or circumvents the discussed disadvantages of relying on inductances and/or adjustable capacitances to adjust the switching frequency of the resonant energy converter. Energy losses in intrinsic or parasitic capacitances as the first intrinsic switch capacitance of the one or more semiconductor switches are further reduced to a low level by the presence of the first inductor due to the fact that the energy stored in these parasitic capacitances during the charge is discharged to the first inductor and temporarily stored in it. The energy stored in the first inductor is subsequently returned to the parasitic or intrinsic capacitances of the one or more semiconductor switches. Parasitic or intrinsic capacitances can comprise gate-source, gate-drain and sink-source capacitances of a MOSFET switch.
[0011] Although the present invention is described in detail below with reference to deployments in resonant power converters/inverters and corresponding DC-DC power converters of the Class E or DE type or topology, the skilled person will understand that the The invention is equally applicable to other types of resonant power inverters, rectifiers and converters such as E, F, DE and π2 class inverters and rectifiers and booster resonant converters, step-downs, SEPIC, LCC, LLC etc..
[0012] The voltage regulation cycle may comprise a reference voltage generator that supplies a DC or AC reference voltage to a first input of an error comparator or amplifier. A second comparator input can be coupled to the converter output voltage and a comparator output can be operatively coupled to a control input of the first bias voltage source. In this way, the error comparator or amplifier can be configured to generate an error signal suitable as a control signal for the first bias voltage source by a comparison of the converter output voltage with the DC or AC reference voltage. The error signal or signals applied to the first bias voltage source increases or decreases the first adjustable bias voltage in an appropriate direction to adjust the converter output voltage to the target output voltage indicated by the DC or AC reference voltage , as further explained in detail below in connection with the attached drawings.
[0013] The skilled person will note that the switching network can comprise numerous types of switch topologies such as single switch topology, half-bridge or full-bridge switch topologies. According to a preferred embodiment, the switching network comprises a first semiconductor switch with a control terminal coupled to the control input of the switching network and an output terminal coupled to the switch input and the switch output. An input inductor is coupled between the input voltage and the switch input. This modality may comprise a basic class E power inverter or converter in which the switching network comprises a single semiconductor switch with its output terminal, for example a drain terminal of a MOSFET, coupled to both the input and output of the switching network. The input inductor forms part of the resonant network to control the setting of the predetermined resonant frequency (fR). The control terminal, for example a port or base terminal, of the single semiconductor switch is coupled to the control input of the switching network.
[0014] The input inductor and the first inductor may be magnetically coupled with a predetermined magnetic coupling coefficient, preferably a magnetic coupling coefficient greater than 0.1 or even more preferably greater than 0.4. Magnetic coupling provides numerous advantages over the uncoupled first inductor and input inductor case such as improved phase response between the signal at the switching network control input and at the switch output and higher and more constant gain. Magnetic coupling ensures that the inductor currents of the input inductor and the first inductor are out of phase. Consequently, a phase shift between the control signal input, for example a gate voltage of the MOSFET switch, the switching network and the switch output is very close to 180 degrees. Furthermore, the magnetic coupling is preferably substantially constant over a wide frequency range to provide a more constant level of the first adjustable bias voltage when the power converter output voltage VFORA is regulated.
[0015] Another preferred embodiment of the present resonant energy converter comprises a half-bridge based switching network. The switching network comprises a first semiconductor switch coupled between the switch output and a voltage supply rail of the resonant energy converter and having a control terminal coupled to the control input of the switching network. The switching network further comprises a second semiconductor switch coupled between the switch output and the input terminal. A control terminal of the second semiconductor switch is coupled to a second bias voltage source through a cascade of a second inductor with substantially fixed inductance and a third inductor with substantially fixed inductance. A feedback capacitor from the switching network is coupled between the switch output and an intermediate node between the second and third inductors. That embodiment of the present resonant energy converter may comprise a class DE energy converter, inverter or form part of a class DE based DC-Dc energy converter.
[0016] The feedback capacitor serves as a self-elevating device that raises a level of voltage supplied to the control terminal of the second semiconductor switch and thereby facilitates the use of an N-channel MOSFET transistor as a semiconductor switch device. The second inductor serves as a high impedance signal path at the oscillation frequency that allows the passage of a bias voltage component relatively slowly generated by the second bias voltage source, but which blocks the passage of a voltage component high frequency frequency supplied through the feedback capacitor. Consequently, by combining the bias voltage components supplied through the second inductor and the feedback capacitor, the control voltage at the second switch is level-shifted and referred to the switch output rather than the voltage supply rail of the first switch semiconductor as a grounding voltage or a negative power supply voltage if the input voltage is a positive DC voltage. The auto-oscillate cycle can be configured to ensure that each of the semiconductor switches S1 and S2 is alternately switched between conductive and non-conductive states. Semiconductor switches S1 and S2 are also switched on the opposite phase according to a non-overlapping scheme.
[0017] The first inductor and the third inductor may be magnetically coupled with a predetermined magnetic coupling coefficient, preferably a magnetic coupling coefficient greater than 0.1 or even more preferably greater than 0.4. The magnetic coupling will energize a phase shift that is substantially 180 degrees between control input signals, e.g., gate signals or voltages, from the first and second semiconductor switches. To provide a large magnetic coupling coefficient between the input inductor and the first inductor, these are wrapped around a common magnetically permeable core or member. For the same reason, the first inducer and the third inducer may be wrapped around a common magnetically permeable core or limb.
[0018] The first bias voltage source can be configured in several ways. In one embodiment, the first bias voltage source may be coupled between a suitable reference or DC bias voltage of the resonant energy converter and a negative supply rail or grounding potential thereof. The first adjustable bias voltage can be derived from the DC bias or reference voltage by voltage splitting or suitable regulation circuitry. In one embodiment, the first bias voltage source comprises a capacitor coupled from the first bias voltage adjustable to a fixed electrical potential of the resonant energy converter as ground. A first tunable resistor is coupled between the first tunable bias voltage and a first dc reference voltage and a second tunable resistor is coupled between the first tunable bias voltage and a second dc reference voltage. The first DC reference voltage can have a DC voltage greater than the maximum peak voltage of the first adjustable bias voltage. The second DC reference voltage may have a DC voltage less than a minimum voltage expected from the first adjustable bias voltage such that the first adjustable bias voltage can be varied over a suitable voltage regulation range by setting a ratio of resistance between the first and second adjustable resistors. Each of the first and second adjustable resistors preferably comprises a MOS transistor which allows the respective resistors to be controlled from a high impedance gate terminal of the MOS transistor.
[0019] The first inductor can have an inductance between 1 nH and 10 μH as well as between 1 nH and 50 nH. The last range of inductance makes it possible to form the first inductor as an electrical trace pattern of a printed circuit board or as an integrated passive semiconductor component which leads to considerable size reduction and reliability advantages of the resonant energy converter.
[0020] The substantially fixed inductance of the first inductor is preferably determined experimentally, for example, by adjusting its value until a suitable voltage swing is obtained at the switching network control input as explained below in further detail. Preferably, the substantially fixed inductance is defined such that a peak voltage at the control input of the switching network exceeds a threshold voltage of at least one of the semiconductor switches of the switching network. This threshold voltage can, for example, extend between 5 and 10 V across an N-channel power MOSFET, but the person skilled will note that other types of semiconductor switches may have different threshold voltages depending on the characteristics of the power technology. semiconductor in question.
[0021] In one embodiment, the substantially fixed inductance of the first inductor is selected such that an oscillation between peak and peak voltage at the switching network control input is approximately equal to a numerical value of the threshold voltage of the at least one of the semiconductor switches of the switching network. In the example mentioned above regarding the N-channel power MOSFET, the oscillation between peak and peak voltage would thus be adjusted to a value between 5 and 10 V according to the threshold voltage.
[0022] In another embodiment, the self-oscillating feedback loop comprises a series resonant circuit coupled between the control input of the first semiconductor switch and a fixed electrical potential of the converter. The series resonant circuit preferably comprises a cascade of capacitor and an inductor connected between the control input of the semiconductor switch and a negative power supply rail, for example, to ground. The series resonant circuit works to introduce additional non-uniform frequency components by attenuating one or more uniform harmonic frequency components to a fundamental frequency component of the oscillating waveform voltage at the control input of the switching network, eg the gate of the first semiconductor switch. This leads to a trapezoidal waveform of the oscillating voltage waveform and results in faster switch on and off times.
[0023] A useful embodiment of the present resonant energy converter comprises a DC-DC energy converter. The DC-DC power converter is preferably constructed or tapped by coupling a rectifier between the output of the resonant network and the inverter or converter output terminal to generate a rectified DC output voltage. The rectifier may comprise one or more diodes to provide passive rectification of the DC output voltage. The rectifier of an alternative embodiment of the resonant energy converter comprises a synchronous rectifier which may comprise one or more semiconductor switches. According to such an embodiment, the synchronous rectifier comprises: a rectifying semiconductor switch configured to rectify an output voltage of the resonant network in accordance with a rectifier control input of the rectifying semiconductor switch. A first rectifier inductor with a substantially fixed inductance is coupled between a fixed or adjustable rectifier bias voltage and the rectifier control input. It is a significant advantage of this mode that the fixed or adjustable rectifier bias voltage of the rectifier can be left uncoupled or disconnected from the first bias voltage source that generates the first adjustable bias voltage to the switching network on the input side of the resonant energy converter for the reasons discussed in detail below with reference to Figure 8 of the accompanying drawings. The fixed or adjustable rectifier bias voltage may, for example, be coupled to a fixed DC bias voltage source of the resonance energy converter or to the rectified DC output voltage via a resistive or capacitive voltage divider.
[0024] The skilled person will note that numerous types of semiconductor transistors can be used to deploy each of the first and second semiconductor switches depending on requirements such as threshold voltage, gate source rupture voltage, gate source rupture voltage, drain etc., imposed by any particular resonant energy converter. Each of the first and second semiconductor switches may, for example, comprise a MOSFET or IGBT such as a Gallium Nitride (GaN) or Silicon Carbide (SiC) MOSFET.
[0025] A second aspect of the invention relates to a resonant energy converter assembly comprising a resonant energy converter according to any of the above described embodiments and a carrier substrate having at least the switching network and the resonant circuit integrated therein wherein an electrical trace pattern of the carrier substrate forms the first inductor. The carrier substrate may comprise a single-layer or multi-layer printed circuit board with integrally formed electrical wiring patterns interconnecting various electronic components of the resonant energy converter. The small relative inductance required for the first inductance to achieve the power converter's VHF switching frequencies, for example, in the order of tens of nH, facilitates an advantageous integration of the first inductor and potentially other inductors of the power converter. suitable size, directly into the wiring pattern of carrier substrates such as printed circuit boards. This type of integration leads to several advantages such as saving component costs, reducing assembly time and costs, and possibly improving the reliability of the power converter assembly.
[0026] A particularly advantageous embodiment of the carrier substrate comprises a semiconductor mold, such as a CMOS-based integrated circuit, which integrates all active and passive components of the present resonant energy converter therein. Brief Description of Drawings
[0027] A preferred embodiment of the invention will be described in more detail in connection with the attached drawings, in which:
[0028] Figure 1A) is an electrical circuit diagram of a class E resonant energy converter according to a first embodiment of the invention,
[0029] Figure 1B) is an electrical circuit diagram of a class E resonant energy converter comprising a pair of magnetic inductors according to a second embodiment of the invention,
[0030] Figure 2A) is an electrical circuit diagram of a class E resonant energy converter comprising a series resonant circuit according to a third embodiment of the invention,
[0031] Figure 2B) is an electrical circuit diagram of a class E resonant energy converter comprising a series resonant circuit according to a fourth embodiment of the invention,
[0032] Figure 2C) is an electrical circuit diagram of a gate drive circuit for class E and DE resonant power converters comprising a plurality of series resonant circuits,
[0033] Figure 2D) shows a plurality of magnitude and phase response curves of transfer functions of a MOSFET switch of the class E resonant energy converter according to the third embodiment of the invention,
[0034] Figure 2E) shows a plurality of control input signal waveforms of the MOSFET switch of the class E resonant energy converter according to the third embodiment of the invention,
[0035] Figure 3A) is an electrical circuit diagram of a class DE resonant energy converter according to a fifth embodiment of the invention,
[0036] Figure 3B) is an electrical circuit diagram of a class DE resonant energy converter comprising a pair of magnetically coupled inductors according to a sixth embodiment of the invention,
[0037] Figure 4 is an electrical circuit diagram of an exemplary DC-DC power converter based on class E resonant power converter according to the first embodiment of the invention,
[0038] Figure 5 shows a series of graphs illustrating the voltage waveforms at the output of a switching network of the class E resonant energy converter of the first mode for different polarization voltage levels applied to the control input of the switching network,
[0039] Figure 6 is a circuit simulation model of a second exemplary DC-DC power converter based on the first mode of class E resonant power converter,
[0040] Figure 7 shows a series of graphs illustrating various simulated voltage waveforms of the second DC-DC power converter for four different DC bias voltage levels of an adjustable bias voltage; and
[0041] Figure 8 is an electrical circuit diagram of a third DC-DC power converter with synchronous rectification on the output side based on class E resonant power converter according to the first embodiment of the invention Detailed Description of Preferred Modalities
[0042] Figure 1A) is a simplified electrical circuit diagram of a class E 100 resonant energy converter according to a first embodiment of the invention. The present Class E resonant energy converter is partially well adapted for operation in the VHF frequency range, for example, at switching frequencies above 10 MHz or even higher, such as between 30 and 300 MHz due, among other factors, to low switching losses in connection with the operation of a self-oscillating feedback loop connected around a transistor switching element S1 as explained in more detail below.
[0043] The Class E 100 resonant power inverter or converter comprises an input pad or terminal 102 for receiving a DC VEN input voltage from a DC power supply 104. The DC voltage level it can vary considerably according to the requirements of any particular conversion application as extending between 1V and 500V, for example between 10V and 230V. A switching network comprises a single switch transistor S1. The skilled person will understand that the switch transistor S1 can comprise different types of semiconductor transistors like MOSFETs and IGBTs. The skilled person will also understand that the switch transistor S1 in practice can be formed of a plurality of separate and parallel transistors, for example, to distribute the operating currents between several devices. In one embodiment of the invention, S1 is formed by an IRF5802 power MOSFET available from the manufacturer International Rectifier. A VGS gate terminal of switch transistor S1 forms a switching network control input that allows S1 to be switched between a conductive state or on state with low resistance between the drain and source terminals and a non-conductor or off state with very large resistance between drain and source terminals. A VDS drain terminal of the switch transistor S1 forms both a switch input and a switch output of the switching network in the present embodiment based on a single switch transistor. The VDS drain terminal is on one side coupled to the DC input voltage via a LIN 108 input inductor. The VDS drain terminal is also coupled to a first side of a series resonant network comprising the resonant capacitor CR and the LR resonant inductor. The input inductor LIN, the resonant capacitor CR, an intrinsic drain-source capacitance CDS of the MOSFET S1 and the resonant inductor LR 112 together form a resonant network of the power converter 100. A second opposite side of the series resonant network it is operatively coupled to an output terminal 114 or node of the Class E resonant energy converter 100 either directly as illustrated or via a suitable rectifying circuit as illustrated in detail below. An inverter load is schematically indicated by a load resistor RLOAD connected to the converter at output terminal 114 and can generally exhibit inductive, capacitive, and resistive impedance. The resonant network is designed with a resonant frequency (fR) of about 50 MHz in the present implementation, but the resonant frequency may vary depending on the requirements of the application in question. In practice, the respective values of the resonant capacitor CR and the resonant inductor LR can be selected such that a target output energy at the output of the converter is achieved for a particular load impedance. Therefore, the value of the input inductor LIN is selected such that a desired or target value of the predetermined resonant frequency (fR) is reached in view of the intrinsic sink-source capacitance CDS for the selected switch transistor.
[0044] The present Class E 100 resonant power converter comprises a self-oscillating feedback loop arranged around the transistor switch S1 such that the oscillation frequency of the cycle defines the switching or operating frequency of the power converter 100 as briefly mentioned above. The self-oscillating feedback loop comprises an intrinsic gate-drain capacitance CGD of the transistor switch S1 which transmits a 180 degree phase shifted portion of the switch output signal at the drain terminal VDS back to the gate terminal of the transistor switch S1. The additional cycle phase shift is introduced by the gate inductor LG which preferably comprises a substantially fixed inductance. The gate inductor LG is coupled between a variable bias voltage VPolarization and the gate terminal of transistor switch S1. The variable bias voltage VPolarization is generated by a bias voltage generator or source with a design explained in more detail below in connection with Figure 4. However, the adjustable bias voltage VPolarization applied to the gate terminal of transistor switch S1 through the LG gate inductor provides an advantageous mechanism to control the output voltage of VFORA converter. This mechanism exploits that the time period of the cycle time, the cycle time being the reciprocal of the feedback loop oscillation frequency, during which S1 remains in a non-conductive state is controlled by the aforementioned components of the resonant network which defines the resonant frequency (fR). The last frequency controls when the voltage at the switch output in VDS reaches base or zero volts, being the lower power supply rail of the converter in the present mode and thus allowing S1 to be turned on again without introducing losses switch to discharge the CDS intrinsic drain-source capacitance. This operating mechanism in which the resonant circuit is used to discharge the intrinsic semiconductor switch capacitance until the voltage across the semiconductor switch reaches approximately zero is usually denoted zero voltage switching operation (ZVS).
[0045] Conversely, the time period of the cycle time during which S1 remains conducting or in its activated state, can be controlled by the adjustable bias voltage level. This property allows a duty cycle and, therefore, the oscillation frequency of the auto-swing cycle is adjusted. This is explained in more detail in connection with Figure 5 below. Since the switch output in VDS is directly coupled to the DC input voltage through the LIN input inductor the average voltage at the VDS switch output is powered to equal the DC input voltage. The integral of a frequency half-period sine waveform (fR) is equal to the sine amplitude divided by pi times the resonant frequency (fR). Furthermore, when S1 is carrying the voltage back and forth, S1 is essentially zero such that the voltage at the VDS switch output becomes substantially zero. These circumstances lead to the following equation for a peak voltage, VDS, PEAK, through S1:

[0046] where fS = The oscillation frequency of the auto-swing cycle which is equal to the switching frequency of the power converter.
[0047] Equation (1) reveals that a decreasing oscillation frequency leads to increasing switch output voltage VDS, as illustrated below by the switch output voltages VDS of Figure 5.
[0048] The voltage waveforms, duty cycle control and oscillation frequency control discussed above are illustrated in graphs 500, 510 and 520 of Figure 5 for three different levels of adjustable bias voltage VPolarization applied to the inductor of substantially fixed inductance gate LG. The scale on the y-axis of all graphs indicates voltage in volts while the x-axis scale indicates time in steps of 10 ns such that the entire x-axis spans about 100 ns. As mentioned above, LG is coupled to the control input or VGS gate of transistor S1 switch. In graph 500, the adjustable bias voltage VPolarization has been set to a level that results in a duty cycle of approximately 0.5 on the VDS switch output voltage. Waveform 501 shows the VDS switch output voltage while waveform 503 shows the corresponding gate-source voltage applied to the VGS port of S1. It is evident that the cycle time of the VDS switch output voltage is about 10 s corresponding to an oscillation frequency of about 100 MHz.
[0049] In practice, the substantially fixed inductance of the LG gate inductor can be selected such that a desired voltage amplitude of the gate-source voltage waveform (oscillating) is achieved. The voltage amplitude is preferably adjusted such that a suitable peak voltage at the gate terminal of the MOSFET switch S1 is reached in view of its threshold voltage and its gate break voltage. This means that the peak voltage at the gate terminal must be large enough to exceed the threshold voltage of the chosen semiconductor switch, eg VTH of MOSFET switch S1. The oscillation frequency fS of the auto-swing cycle will inherently extend close to the resonant frequency (fR) of the resonant network if the bias voltage is adjusted to approximately the threshold voltage of MOSFET switch S1. If the adjustable bias voltage VPolarization is increased above the threshold voltage, the ON period of MOSFET S1 switch increases and leads to increased duty cycle of the swing switch output voltage waveform. This leads to a decreasing oscillation frequency or switching frequency of the power converter. The decrease in the oscillation frequency leads to an increase in the peak voltage VDS,PICO at the switch output, as explained above in connection with equation (1) and a corresponding increase in the peak voltage across the series resonant network comprising ende the resonant capacitor CR and the resonant inductor LR due to their coupling to the switch output voltage VDS. Furthermore, because the series resonant network exhibits inductive impedance, the decreasing oscillation frequency of the switch output voltage waveform leads to a decrease in the series resonant network impedance. The decrease in impedance successively leads to an increase in current and energy through the resonant network in series and through the load resistor RCARGA - in effect, increasing the output voltage of the VFORA converter.
[0050] Consequently, the converter output voltage VFORA can be controlled by appropriately controlling the adjustable bias voltage VPolarization applied to the substantially fixed inductance gate inductor LG. This feature provides a highly flexible and fast way of controlling the VFORA converter output voltage compared to the prior art mechanism based on adjustable inductances and/or capacitances. In particular, the adjustment range of the adjustable bias voltage VPolarization can be very wide compared to the possible adjustment range of the adjustable inductances and/or capacitances.
[0051] In graph 510, the adjustable bias voltage VPolarization has been increased to a level that results in a duty cycle of approximately 0.7 on the VDS switch output voltage. Waveform 511 shows the VDS switch output voltage while waveform 513 shows the corresponding gate-source voltage applied to the VGS gate of S1. As illustrated, the VDS switch output voltage increases from a peak level of approximately 30 volts to the 0.5 duty cycle condition pictured above to approximately 50 volts. It is evident that the cycle time of the VDS switch output voltage has increased to about 18 ns which corresponds to an oscillation frequency of about 55 MHz. Finally, in graph 520, the adjustable bias voltage VPolarization has been further increased up to a level that results in a duty cycle of approximately 0.9 on the VDS switch output voltage. Waveform 521 shows the VDS switch output voltage while waveform 523 shows the corresponding gate-source voltage applied to the VGS gate of S1. As illustrated, the VDS switch output voltage further increases from a peak level of approximately 50 volts to the 0.7 duty cycle condition pictured above to approximately 150 volts. It is evident that the cycle time of the VDS switch output voltage has further decreased to about 50 ns which corresponds to an oscillation frequency of about 20 MHz.
[0052] Figure 1B) is an electrical circuit diagram of a class E 100b resonant energy converter comprising a pair of magnetically coupled inductors according to a second embodiment of the invention. The skilled person will note that the features, functions and components discussed above of the first embodiment of the Class E 100 resonant energy converter can apply to the present embodiment as well. Also, corresponding components in the first and second embodiments of the present Class E resonant energy converter have been provided with corresponding reference numerals for ease of comparison. The main difference between the first and second modalities is that the LIN input inductor and the previously discussed separate and substantially uncoupled gate inductor LG have been replaced by the pair of magnetically coupled inductors LIN and LG in which the respective functions in the present converter Class E 100b resonant energy are similar to those of the first modality. The person skilled in the art will note that the magnetic coupling between the Lin input choke and the LG gate choke can be achieved in numerous ways, eg through a closely spaced arrangement of the inductors, eg coaxially arranged. Magnetic coupling provides numerous advantages over the first mode such as improved phase response between the control input and the switch output of the MOSFET S1 switch and higher, more constant gain. Magnetic coupling ensures that the respective inductor currents of Lin input inductor and LG gate inductor are out of phase. Consequently, the phase shift between the switch control input S1 and the switch output is very close to 180 degrees. Furthermore, the Lin input inductor and the magnetically coupled LG gate inductor can be configured such that the magnetic coupling is substantially constant over a wide frequency range to provide a steadier level of the first adjustable bias voltage when the voltage VFORA output of the power converter is regulated.
[0053] The magnetic coupling between the Lin input inductor and the magnetically coupled LG gate inductor can also be achieved by a transformer structure as schematically indicated in Figure 1B). The Lin input inductor and the LG gate inductor can, for example, be wrapped around a common magnetically permeable core or member. The last modality has the advantage of a stronger coupling of magnetic fields between the Lin input inductor and the LG gate inductor. This powers an even closer phase shift of 180 degrees between the control input of switch S1 (ie, the gate voltage of switch S1) and the switch output (ie, the drain voltage of switch S1).
[0054] The Lin input inductor and the magnetically coupled LG gate inductor can be configured to have a magnetic coupling that is sufficient to ensure that the inductor current energized in LG by LIN is large enough to drive the switch control input S1. In this case, gate triggering can also be used to trigger cascode-coupled transistors where the intrinsic CGD capacitance is small or non-existent.
[0055] Figure 2A) is a simplified electrical circuit diagram of a class E 200 resonant energy converter according to a third embodiment of the invention. The present power converter is of similar topology to that power converter discussed above based on a single switch transistor S1. The skilled person will note that the features, functions, and components discussed above in the first modality may apply to this modality as well. Also, corresponding components in the first and second embodiments of the present Class E resonant energy converter have been provided with corresponding reference numerals for ease of comparison. The main difference between the first and second embodiments is in the addition of a series resonant circuit, comprising a cascade of capacitor CMRe inductor LMR, connected between the VGS gate node or terminal of the switch transistor S1 and the negative supply rail , for example, the earth. The function of the series resonant circuit is to introduce the additional non-uniform frequency components by attenuating one or more uniform harmonic frequency components, to the fundamental frequency component of the swing gate voltage waveform of the switch transistor S1. This leads to a trapezoidal waveform of the switch transistor S1 gate voltage which leads to faster switch on and off times. This is beneficial because it reduces conduction losses, as the S1 switch MOSFETs will have relatively high resistance when the gate voltage is just above the threshold voltage. Figure 2C) shows generally applicable embodiments of a series resonant network 201a coupled to the control input, for example a gate terminal, a switch transistor or a switching network of a class E resonant energy converter or DE as the class E and DE resonant power converters depicted in Figures 1A) to 1B), Figure 2A), Figures 3A) to 3B), Figure 4 and Figure 8. The series resonant network 201 comprises a plurality of circuits series resonators of which one or more may be included in the particular design of the class E or DE resonant energy converter.
[0056] If a transistor switch like a MOSFET is driven by a sine wave the gate signal will be just above the threshold voltage of the MOSFET at a beginning and an end of a conduction period of the MOSFET. This causes the activated resistance to be very high in these periods as the MOSFET is only fully activated when the gate signal is greater than around twice the threshold voltage. In many resonant energy converters these time periods are also where the largest currents are running through the MOSFET. Therefore, a lot of energy is dissipated in these periods of time. In order to improve the MOSFET activation speed, higher order harmonics can be added to the fundamental sine wave which leads to a more trapezoidal gate signal, as mentioned above. This can be achieved by adding one or more resonant circuits in series, each preferably comprising an LC circuit, between the control input, i.e. the port of the present MOSFET switch and a MOSFET drain or source, as illustrated in Figure 2C). At present, the capacitor, CGExt, is optional and can be used to increase the overall gain of the gate signal, as shown in Figure 2D). Likewise the capacitor, CGSext, can be optionally used to lower the gain. The first and second series resonant circuits based on LC C4HI and L4HI and C2HI and L2HI, respectively, are both connected to the MOSSFET S1 switch drain and will cause the major harmonic to be in phase with the output voltage of switch on switch output, VDS. The third and fourth series resonant circuits based on LC C4HO and L4HO and C2HO and L2HO, respectively, connected to ground will cause the harmonic to be out of phase with VDS as illustrated in Figure 2D). The magnitude response curve 250 of graph 245 of Figure 2D) illustrates how an LC circuit with a resonance at the second harmonic of the switching frequency of the power converter causes a peak in gain at the third harmonic and which is in phase with the output VDS switch. It can be shown that a 3rd harmonic in phase will be desirable for a 25% duty cycle, but for a 50% duty cycle it would be more desirable to have the signal out of phase as this would increase the signal right after the activation of the MOSFET and just before the MOSFET deactivation. This feature can be achieved by defining a series resonant circuit of Lc with resonant frequency at the 2nd harmonic to ground, as indicated by the third and fourth series resonant circuits C4HO and L4HO and C2HO and L2HO, respectively, of Figure 2C). Through this connection, the response curve of magnitude 252 in Figure 2D) is achieved. At present, a zero is seen at the 2nd harmonic of the switching frequency and again a peak at the 3rd harmonic, but this time with a phase shift of almost 180 degrees (please refer to curve 252 of the phase graph 246). The skilled person will understand that the number of harmonics to include in a given power converter design will depend on several parameters such as price, complexity, efficiency, etc. Adding the higher order harmonic will generally increase the performance of the power converter, but it is important to consider which harmonic to include and the magnitude of these harmonics compared to the fundamental. Graphs 247 and 248 of Figure 2E) show the fundamental harmonics and the switching frequency 3rd and 5th harmonics are in and out of phase with the switch output signal for duty cycle D set to 25% and 50%. Note that the * symbol indicates that the signal pictured is in phase with the VDS switch output signal. By comparing the gate trigger signal waveforms with the indicated ideal (rectangular) waveform of the same, it is clear that it is desirable to place the fundamental out of phase with the switch output signal, but for 3rd and 5th harmonics depend on duty cycle and current waveform. The exemplary gate trigger waveforms that can be achieved by adding harmonics across the series resonant networks described above are shown in graphs 247 and 248 of Figure 2E).
[0057] Figure 2B) is an electrical circuit diagram of a class E 200b resonant energy converter comprising a series resonant circuit according to a fourth embodiment of the invention. The person skilled in the art will note that the features, functions and components discussed above of the third mode of Class E 200 resonant energy converter can apply to the present mode as well. Also, corresponding components in the third and fourth embodiments of the present Class E resonant energy converter have been provided with corresponding reference numerals for ease of comparison. The main difference between the third and fourth modalities is that a previously discussed series resonant circuit, comprising the cascade of CMR capacitor and LMR inductor, connected between the gate node or VGS terminal of switch transistor S1 and ground has been replaced. by another type of resonant circuit comprising the CMRe capacitor and the LMR inductor parallel coupled. The parallel-coupled CMR capacitor and LMR inductor are connected between the adjustable bias voltage VPolarization and the gate inductor Lg. This connection with the parallel-coupled CMR capacitor and LMR inductor provides the same advantages as the series resonant circuit employed in the third mode, but with much smaller Lg and LMR inductor inductances leading to a significant reduction in cost and size.
[0058] Figure 3A) is a simplified electrical circuit diagram of a class DE 300 resonant energy converter or inverter according to a fifth embodiment of the invention. The present resonant power inverter 300 is based on a switching network comprising a half-bridge semiconductor topology. The present DE 300 resonant energy converter provides several important advantages. One of the biggest challenges when designing resonant energy converters is an enormous voltage stress imposed on the switch element in the switch energy converter topology described above in connection with the first, second, third and fourth embodiments of the invention . This voltage stress can reach 3 to 4 times the level of the DC input voltage. Using a half-bridge switch topology in place limits a peak voltage across each of the semiconductor switches S1 and S2 to one level of the input voltage. However, this requires a fast and efficient high side trigger which can present a significant advantage if an operating frequency or switching frequency above approximately 5 MHz is desired. The present generation of the first adjustable bias voltage solves this problem as it can also be used as a high side drive (VPolarization1) in several tens of me-gahertz. The half bridge comprises a cascade of the first semiconductor switch S1 coupled between a 311 switch output terminal and ground and a second semiconductor switch S2 coupled between the 311 switch output terminal and a DC input voltage rail provided through the power input terminal 302 from an external DC voltage source or generator 304. A coupling node or midpoint that interconnects the first and second semiconductor switches S1 and S2 form the switch output terminal 311. This switch output terminal 311 is the drain terminal of the first semiconductor switch S1. This switch output terminal or node 311 is coupled to a first side of a series resonant network comprising the resonant capacitor CR and the resonant inductor LR. A transistor switch drain node S2, coupled to the DC input voltage, comprises the switch input terminal of the present half-bridge switch. Each of the semiconductor switches S1 and S2 may comprise an NMOS power transistor as illustrated by the switch symbol. The intrinsic drain-gate, gate-source, and drain-source capacitances of the NMOS transistor switch S1 are depicted as CGD2, CGS2 and CDS2 and equally as CGD1, CGS1 and CDS1 for the NMOS transistor switch S2.
[0059] The resonant capacitor CR, the intrinsic drain-source capacitances of switches S1 and S2, CDS1 and CDS2, respectively, and the resonant inductor LR in conjunction form a resonant network of the power converter 300. A second opposite side of the resonant network at series is coupled to an output terminal or node 314 of power converter 300. A converter load is schematically illustrated by a load resistor RLOAD connected to the converter at output terminal 314 and can generally exhibit inductive impedance, ca. passive or resistive. Class DE 300 resonant power inverter, furthermore, includes a self-oscillating feedback loop disposed around transistor switch S1 such that an oscillating cycle frequency defines the switching or operating frequency of the power converter in a similar manner. to that discussed above in connection with the first embodiment of the invention. The self-oscillating feedback loop comprises an intrinsic gate-drain capacitance CGD2 of the transistor switch S1 and a first gate inductor LG2 which preferably comprises a substantially fixed inductance as discussed above. The gate inductor LG2 is coupled between a variable bias voltage VPolarization2 and the gate terminal VGS2 of the transistor switch S1. The variable bias voltage VPolarization2 can be generated in a number of ways by an appropriately configured bias voltage generator or source, for example, as explained in more detail below in connection with Figure 4. The self-oscillating feedback loop disposed around transistor switch S1, the current power inverter 300 comprises a second adjustable bias or high side voltage VPolarisation1 which is coupled to the gate terminal of the second semiconductor switch S2 via a cascade of a substantially second inductance fixed LH and a third substantially fixed inductance LG1. The inductances of the LG2 and LG1 gate inductors can be substantially identical. A feedback capacitor CG1 is coupled between the switch output node 311 and an intermediate node between the second and third substantially fixed inductances LH and LG1. The feedback capacitor CG1 serves as a self-elevating device that raises the voltage level supplied to the upper transistor switch S2 and facilitates the use of an N-channel MOSFET transistor as the switching device. The LH inductor serves as a high-impedance signal path at the oscillation frequency that allows the passage of a relatively slowly varying bias voltage component generated by the second adjustable bias voltage VPolarization1, but which blocks the passage of a component of relatively high frequency voltage supplied through the self-elevating capacitor or feedback capacitor CG1. Consequently, by combining the bias voltage components of LH and CG1, the gate control voltage at the gate terminal of the second switch S2 is level-shifted. In this way, the gate control voltage is referred to the switch output node 311 rather than ground. The auto-oscillation cycle ensures that each of the semiconductor switches S1 and S2 is alternately switched between the conductive and non-conductive states in opposite phase in a non-overlapping manner. In this way, the switch output node 311 becomes alternately tethered to the DC input voltage VEN and to ground through semiconductor switches S1 and S2 at a frequency defined by the oscillation frequency of the auto-swing cycle.
[0060] The duty cycle of the switch output voltage waveforms and therefore the converter output voltage in VFORA can again be controlled by synchronously controlling the respective bias voltages provided by the first and second adjustable bias voltages VPolarization2 and VPolarization1.
[0061] Figure 3B) is an electrical circuit diagram of a class DE 300b resonant energy converter comprising a pair of magnetically coupled inductors LG1 and LG2 according to a sixth embodiment of the invention. The skilled person will note that the features, functions and components discussed above of the first embodiment of the Class DE 300 resonant energy converter can apply to the present embodiment as well. Likewise, the corresponding components in the fifth and sixth embodiments of the present resonant energy converters have been provided with numerical references to facilitate comparison. The main difference between the fifth and sixth embodiments is that the previously discussed separate and substantially uncoupled gate inductors LG1 and LG2 have been replaced by the pair of magnetically coupled inductors LG1 and LG2 in which their respective functions in the present class resonant energy converter And 300b are similar to those of the first modality. The person skilled in the art will note that the magnetic coupling between the gate inductors LG1 and LG2 can be achieved in a number of ways, for example through a closely spaced arrangement of the inductors, for example coaxially arranged. Magnetic coupling provides numerous advantages over the above-described first mode of class DE 300 resonant power converter such as improved phase response between the respective gate signals at gate terminals or control inputs, of inductors LG1 and LG2 and higher gain . Magnetic coupling ensures that the respective inductor currents in inductors LG1 and LG2 are out of phase. Therefore, a phase shift that is substantially 180 degrees between the gate signals of inductors LG1 and LG2 is energized.
[0062] The magnetic coupling between the inductors can also be achieved by a transformer structure as schematically indicated in Figure 3B) in which the inductors LG1 and LG2 are wound around a common magnetically permeable core. The latter mode has the advantage that a greater magnetic coupling between inductors LG1 and LG2 can be achieved and the relative phase shift of substantially 180 degrees between the respective gate signals or voltages of the MOSFET switches S1 and S2 is performed even stronger .
[0063] Figure 4 is a schematic electrical circuit diagram of a DC-DC or switched-mode (SMPS) 400 converter/power supply that is based on the Class E 100 resonant power converter or inverter disclosed above in a first embodiment of the invention. The DC-DC 400 power converter comprises, in addition to the Class E 100 resonant power converter circuitry, a voltage control loop that controls the level of an output DC voltage VFORA of the DC converter -DC and a rectifier 413 schematically illustrated by a storage capacitor and a diode. Rectifier 413 preferably includes a series inductor coupled between the illustrated diode and the output voltage terminal VFORA. The skilled person will note that the illustrated diode(s) based on the rectifier 413 can be replaced by a synchronous rectifier based on one or more actively controlled semiconductor switches instead of diodes as described in further detail below with reference to Figure 8. The voltage control loop regulates the respective resistances of a pair of pull-up and pull-down MOSFET resistors M1 and M2 that form part of the bias voltage source or generator which provides adjustable bias voltage VPolarization. Adjustable bias voltage VPolarization is applied to transistor switch gate terminal S1 via gate inductor LG, as explained in connection with Figure 1A) above. The voltage control loop comprises an error comparator or amplifier 414 which has a first input coupled to a DC or AC reference voltage VREF and a second input coupled to the converter DC output voltage VFORA. A resulting VERR error signal that reflects whether the output voltage is less than or greater than the reference voltage that is supplied to an optional 414 level converter. The 414 level converter is configured to provide appropriate gate control signals VC1 and VC2 for the MOSFET pull-up and pull-down resistor pair M1 and M2 or to increase or decrease the adjustable bias voltage VPolarization. The bias voltage source or generator comprises MOSFET resistors M1 and M2 coupled between the DC input voltage and ground. Therefore, the adjustable bias voltage VPolarization can be pulled towards the DC input voltage or be grounded depending on the adjustable activated resistances of the MOS-FET resistors M1 and M2. The skilled person will note that the voltage control loop can be configured in a number of ways to provide the appropriate control signals for the MOSFET resistors M1 and M2, for example, through proportional voltage control or through pure voltage control. binary voltage, that is, up/down.
[0064] Figure 6 is a circuit simulation model of a second DC-DC power converter based on the first mode of class E resonant power converter. The DC-DC converter comprises a rectifier coupled between an output of the series resonant circuit, which includes C1 and L4 and a load resistor R6 coupled to a converter output voltage. The rectifier comprises components C3, D, L2 and C5. The inductor and capacitor component values of the second DC-DC power converter are listed in the figure in Henry and Farad, respectively. In this way, the inductance of the gate inductor Lg is set to a substantially fixed value of 68 nH. The semiconductor switch is modeled by an ideal ISW switch with the listed parameters, ie a 1.0 Q on-state resistance, 1 MQ off-state resistance, and a 4.5 V threshold voltage.
[0065] Figure 7 shows a series of graphs 600, 610, 620, 630 and 640 that illustrate several simulated voltage waveforms of the second DC-DC power converter simulation model by four levels of voltage bias of Fixed DC different from adjustable bias voltage VPolarization. VPolarization is scaled through fixed DC voltage levels of -7.0, -2.0, 3.0, and 8.0 volt as illustrated by the 607, 605, 603, 601 waveforms, respectively, of the 600 graph that shows the DC bias voltage level. The DC input voltage V2 (Vin) is held constant at 50 volts for all simulations.
[0066] The y-axis scale of all graphs indicates voltage in volts while the x-axis scale indicates time in 0.01 μs steps such that the entire x-axis spans about 0, 05 μs.
[0067] Graph 610 illustrates the corresponding oscillating control input voltage waveforms 617, 615, 613, 611 at the indicated gate node (refers to Figure 6) for the four different levels of DC bias voltage. The higher average level of the oscillating control input voltage waveforms for the highest DC bias voltage of 8.0V is evident. Graph 620 illustrates the corresponding switch output voltage waveforms 627, 625, 623, 621 at the switch output node, i.e., at the indicated drain node (refer to Figure 6). The longer conductive states or activated states of the ISW switch for the highest DC bias voltage of 8.0 V are evident, leading to a lower frequency oscillation or switching frequency of the converter.
[0068] Graph 640 illustrates the corresponding load energy waveforms 627, 625, 623, 621 for the energy released from the load resistor R6 through the converter output. Gradually increasing charge power from about 1.5W at the lowest DC bias voltage of -7.0V to about 3.5W at the highest DC bias voltage of 8.0V is evident. Therefore, the converter output power and therefore the converter output voltage can be controlled by adjusting the voltage provided by the adjustable bias voltage VPolarization.
[0069] Figure 8 is a schematic electrical circuit diagram of a DC-DC or switched-mode (SMPS) 800 converter/power supply based on Class E 100 resonant power converter or inverter according to the first embodiment of the invention discussed above. The DC-DC power converter 800 comprises, in addition to the class E resonant power converter circuitry 100, a synchronous rectifier built around transistor switch SR1 and comprising additional passive components LG2 and LFORA. The skilled person will understand that the DC-DC 800 power converter may comprise an output capacitor coupled from VFORA to the negative supply rail (eg ground) and a voltage control loop similar to that discussed above in connection with Figure 4 in the fourth embodiment of the invention. The voltage control loop that is configured to control the output voltage at VFORA of the 800 power converter, as defined by a DC or AC reference voltage. Transistor switching element SR1 and inductors LG2 and LFORA provides a synchronous rectifier in the DC-DC power converter 800 and replaces the diode based asynchronous rectifier circuit 413 discussed above. Since the control input, for example, the door trigger signal, from the switching network of present class E and DE resonant power converters does not need a traditional PWM or PDM type of control signal (but only the two adjustable bias voltages VPolarization1 and VPolarization2) the resonant energy converters according to the present embodiments are generally very well suited for synchronous rectification, as illustrated in Figure 8 for that particular embodiment. The traditional PWM or PDM type of control signals are not required because it is not necessary to control a phase between the respective control input signals of the first transistor switch S1 and the rectifying transistor switch SR1. The rectification transistor switch SR1 can, for example, be coupled to a suitable fixed rectifier DC bias voltage VPolarization2 applied to the inductor LG2 coupled to the gate (i.e. control input) of SR1. For rectification purposes, the gate terminal of SR1 is driven by a swinging output voltage, i.e. the drain voltage VDS, from the first semiconductor switch S1 to automatically maintain synchronous operation between S1 and SR1. This absence of the traditional PWM or PDM type of control signals at the respective gate terminals of the first transistor switch S1 and rectifying transistor switch SR1 is a significant advantage that leads to simplified power converter design and lower component count. In isolated power converter applications, the present 413 diode-based asynchronous rectifier circuit has an additional advantage in that it eliminates the need to transmit or communicate the traditional PWM or PDM type control signal or signals through an isolation barrier. voltage of the resonant energy converter. This type of voltage isolation barrier will typically require expensive and space-consuming components such as optocouplers or fast transformers in additional power converter topologies. As illustrated by Figure 8, the present DC-DC power converter with synchronous rectification can be completely symmetrical in terms of circuit topology through a series resonant network comprising the resonant capacitor CR and the resonant inductor LR that enable the bidirectional power flow between the DC input power source VEN 804 and the output voltage at VFORA. The skilled person will note that the input transistor switch S1 and the rectifier transistor switch SR1 can be substantially identical or different components and the same applies to fixed inductance inductors LG2 and LG1 depending on factors such as the converter voltage conversion ratio of resonant energy.
[0070] The skilled person will note that the synchronous rectifier described above can be added to each of the class E and DE resonant energy converter modalities discussed above pictured above in Figure 1B), in Figures 2A) to 2B) and Figures 3A) to 3B).
权利要求:
Claims (21)
[0001]
1. Resonant energy converter (100, 200, 300, 400) comprising: an input terminal (102) for receiving an input voltage (VIN), a switching network comprising one or more semiconductor commutators (S1, S2) controlled by the respective control inputs, the switching network comprising a switch input (VDS) operatively coupled to the input terminal (102) for receiving the input voltage (VIN) and a switch output (VDS) operatively coupled to an input of a resonant network (108, 110, 112) of the resonant energy converter, the resonant network (108, 110, 112) defining a predetermined resonant frequency (fR) and comprising an output operatively coupled to a converter output terminal (VOUT), an auto-oscillating feedback loop coupled from the switch output (VDS) to a control input (VGS) of the switching network to set a converter switching frequency of energy;s whereas the self-oscillating feedback loop comprises: a first intrinsic switch capacitance (CGD) coupled between the switch output (VDS) and the control input (VGS) of the switching network, a first voltage source of bias configured to generate a first adjustable bias voltage (VBias), a first inductor (LG) with substantially fixed inductance coupled between the first bias voltage source and the control input (VGS) of the switching network, characterized by fact that a voltage regulation loop configured to control a power converter output voltage by controlling the first adjustable bias voltage (VBias) applied to the first inductor (LG).
[0002]
2. Resonant energy converter (100, 200, 300, 400), according to claim 1, characterized in that it comprises: an input inductor (LIN) coupled between the input terminal (102) and the input of switch, the switching network comprising a first semiconductor switch (S1) with a control terminal coupled to the control input (VGS) of the switching network and an output terminal coupled to the switch input (VDS) and the switch output (VDS).
[0003]
3. Resonant energy converter (100, 200, 300, 400) according to claim 2, characterized in that the input inductor (LIN) and the first inductor (LG) are magnetically coupled with a coupling coefficient predetermined magnetic, preferably a magnetic coupling coefficient greater than 0.1 or even more preferably greater than 0.4.
[0004]
4. Resonant energy converter (100, 200, 300, 400), according to claim 1, characterized in that the switching network comprises: a first semiconductor switch (S1) coupled between the switch output (311) and a voltage supply rail of the resonant energy converter and having a control terminal coupled to the control input of the switching network, a second semiconductor switch (S2) coupled between the switch output (311) and the input terminal (302); and wherein a control terminal (VGS2) of the second semiconductor switch (S2) is coupled to a second bias voltage source via a cascade of a second inductor (LH) with the substantially fixed inductance and a third inductor (LG1) with the inductance substantially fixed, and wherein a feedback capacitor (CG1) is coupled between the switch output (311) and an intermediate node between the second and third inductors (LH, LG1).
[0005]
5. Resonant energy converter (100, 200, 300, 400) according to claim 4, characterized in that the first inductor (LG2) and the third inductor (LG1) are magnetically coupled with a magnetic coupling coefficient predetermined, preferably a magnetic coupling coefficient greater than 0.1 or even more preferably greater than 0.4.
[0006]
6. Resonant energy converter (100, 200, 300, 400) according to claim 3 or 5, characterized in that the input inductor (LIN) and the first inductor (LG) are wound around a magnetically permeable common limb or core; or the first inducer (LG2) and the third inducer (LG1) are wrapped around a common magnetically permeable core or limb.
[0007]
7. Resonant energy converter (100, 200, 300, 400), according to any one of the preceding claims, characterized in that the first bias voltage source comprises: a capacitor coupled from the first bias voltage. adjustable voltage (VBias) and a fixed electrical potential of the resonant energy converter as ground, a first adjustable resistor (M1) coupled between the first adjustable bias voltage (VBias) and a first DC reference voltage, one second adjustable resistor (M2) coupled between the first adjustable bias voltage (VBias) and a second DC reference voltage.
[0008]
8. Resonant energy converter (100, 200, 300, 400), according to any one of the preceding claims, characterized in that the voltage regulation cycle comprises: a reference voltage generator that supplies a DC voltage or reference AC (VREF) to a first input of an error comparator or amplifier (414), a second input of the error comparator or amplifier (414) which is coupled to the converter output voltage (VOUT), an output of the error comparator or amplifier operatively coupled to a control input of the first bias voltage source.
[0009]
9. Resonant energy converter (100, 200, 300, 400), according to any one of the preceding claims, characterized in that the first inductor has an inductance between 1 nH and 10 μH as between 1 nH and 50 nH.
[0010]
10. Resonant energy converter (100, 200, 300, 400) according to any one of the preceding claims, characterized in that the substantially fixed inductance of the first inductor (LG) is defined such that a peak voltage at the input control voltage (VGS) of the switching network exceeds a threshold voltage of a semiconductor switch (S1, S2) of the switching network.
[0011]
11. Resonant energy converter (100, 200, 300, 400) according to claim 10, characterized in that the substantially fixed inductance of the first inductor (LG) is selected such that an oscillation between peak and voltage peak at the control input (VGS) of the switching network is approximately equal to a numerical value of the threshold voltage of the semiconductor switch of the switching network.
[0012]
12. Resonant energy converter (100, 200, 300, 400), according to any one of the preceding claims, characterized in that the self-oscillating feedback loop further comprises: a series resonant circuit coupled between the input of control (VGS) of the switching network and a fixed electrical potential of the power converter or coupled between the control input (VGS) of the switching network and the switch output (VDS).
[0013]
13. Resonant energy converter (100, 200, 300, 400), according to claim 12, characterized in that the self-oscillating feedback loop further comprises: a first coupled series resonant circuit (C2H0, L2H0) between the control input (VGS) of the first semiconductor switch (S1) and the fixed electrical potential of the converter as a positive or negative DC supply voltage or a grounding voltage, a second series resonant circuit (C2HI, L2HI ) coupled between the control input (VGS) of the first semiconductor switch (S1) and the switch output (VDS).
[0014]
14. Resonant energy converter (100, 200, 300, 400), according to any one of claims 1 to 11, characterized in that the self-oscillating feedback loop additionally comprises: a parallel resonant circuit (CMR, LMR ) coupled in series with the first inductor (LG) between the first adjustable bias voltage (VBias) and the first inductor.
[0015]
15. Resonant energy converter (100, 200, 300, 400), according to any one of the preceding claims, characterized in that it further comprises: a rectifier coupled between the resonant network output and the converter output terminal for provide a rectified DC output voltage.
[0016]
16. Resonant energy converter (100, 200, 300, 400), according to any one of the preceding claims, characterized in that it comprises a synchronous rectifier.
[0017]
17. Resonant energy converter (100, 200, 300, 400), according to claim 16, characterized in that the synchronous rectifier comprises: a rectification semiconductor switch (SR1) configured to rectify a network output voltage resonant according to a rectifier control input of the rectifier semiconductor switch (SR1), a first rectifier inductor (LG2) with a substantially fixed inductance coupled between a fixed or adjustable rectifier bias voltage (VBias2) and the input of rectifier control.
[0018]
18. Resonant energy converter (100, 200, 300, 400), according to claim 17, characterized in that the fixed or adjustable rectifier bias voltage (VBias2) is coupled to a source of bias voltage of Fixed DC or rectified DC output voltage through a resistive or capacitive voltage divider.
[0019]
19. Resonant energy converter (100, 200, 300, 400), according to any one of claims 2 to 18, characterized in that one of the first and second semiconductor switches comprises a MOSFET or IGBT as a MOSFET of Gallium Nitride (GaN) or Silicon Carbide (SiC).
[0020]
20. Resonant energy converter assembly, characterized in that it comprises: a resonant energy converter (100, 200, 300, 400), as defined in any one of the preceding claims, a carrier substrate having at least the switching network and the resonant circuit integrated in it, an electrical trace pattern of the carrier substrate that forms the first inductor.
[0021]
21. Resonant energy converter assembly according to claim 20, characterized in that the carrier substrate comprises a semiconductor mold.
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EP2915245A2|2015-09-09|
US9735676B2|2017-08-15|
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法律状态:
2018-11-21| B06F| Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]|
2020-01-14| B06U| Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]|
2021-03-30| B09A| Decision: intention to grant [chapter 9.1 patent gazette]|
2021-05-25| B16A| Patent or certificate of addition of invention granted|Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 29/10/2013, OBSERVADAS AS CONDICOES LEGAIS. |
优先权:
申请号 | 申请日 | 专利标题
EP12191129|2012-11-02|
EP12191129.1|2012-11-02|
PCT/EP2013/072548|WO2014067915A2|2012-11-02|2013-10-29|Self-oscillating resonant power converter|
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